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TYPICAL INTERCONNECTION NETWORKS MULTIPLE P R O C E S S O R C O M P U T E R D E S I G N 55 + 1 -> 2 -> 3 Greater performance may be achieved by tree-structured architecture shown in Figure 6b. The terminal node processors may be thought of as the data processors in the previously defined pipelined structure although the control processor super-structure allows fast processors to do additional work while a particularly slow processor is still executed. Whether such overlap can be achieved is determined by the common CP over the portion of the tree containing the two subject processors.

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