By J J Dongarra; et al
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We would like it to see the value of a after the increment. But that requires that the value has both been written back to the memory from the cache of the ﬁrst CPU and read into cache (even if the corresponding cache line had previously been read into memory) on the second CPU. In other words, we want the program to execute as if the cache were not present, that is, as if every load and store operation worked directly on the memory and in the order in which it was written. The copies of the memory in the cache are used only to improve performance of memory operations; they do not change the behavior of programs that are accessing the same memory locations.
Cache memory systems that accomplish this objective are called cache coherent. Most (but not all) shared-memory systems are cache coherent. Ensuring that a memory system is cache coherent requires additional hardware and adds to the complexity of the system. On the other hand, it simpliﬁes the job of the programmer, since the correctness of a program doesn’t depend on details of the behavior of the cache. We will see, however, that while cache coherence is necessary, it is not sufﬁcient to provide the programmer with a friendly programming environment.
This is a factor of 16 in 20 years, or equivalently a doubling every 5 years. Remarkable advances have occurred in other areas of computer technology as well. The cost per byte of storage, both in computer memory and in disk storage, has fallen along a similar exponential curve, as has the physical size per byte of storage (in fact, cost and size are closely related). 1 01/85 01/90 01/95 01/00 01/05 Improvement in CPU performance measured by clock rate in nanoseconds. in many cases, from n3 to n.